The bad news, however, is that the manufacturers of FETs don't control their parameters well, and have somehow conned us into living with the problem. The gate-source voltage needed to bias the transistor into the linear region can vary between 0.25V and 8V, which leaves a good 7.75V down to a hopeless 0.4V for the transistor and load if used with a typical NiCad 8.4V PP3 You'll have to get more FETs than you need and throw out the dogs. It's easy enough to test, and this parameter is a given for a particular device - it doesn't age of change greatly with temperature. Design manuals get all sniffy about that sort of thing because selecting FETs obviously adds to the cost if you are mass producing something. That's not the case here, and there's just no way to cope with a manufacturing tolerance which can throw more than 90% of the battery voltage away in variations in manufacture without screening the bad 'uns. Ideally you'd run the FET from a higher power supply voltgae, like two batteries in series and perhaps double the values of R2 and R3, but it would be a shame to have to use two batteres just because the manufacturers couldn't be bothered to grade by Vgs. You can tell if you have a good 'un by measuring the voltage at the drain and source of the FET in circuit. Ideally you would like Vs to be about 2.5V and Vd to be about 6V (assuming a 8.4V Nicad PP3) In practice you can live with Vs at 1 to 3.5V which will correspond to a Vd of 7.4 to 4.9. This will run the FET at 0.25mA to 0.9mA I prototyped this and tested it out with all the spare FETs I had in my junkbox, on a supply voltage of 8.5V device Vs Vd usable 2N3819 #1 2.07 6.3 OK 2N3819 #2 2.03 6.2 OK 2N3819 #3 1.4 6.8 OK J309 #1 2.1 6.1 OK J309 #2 2.27 5.98 OK BF244B 2.39 5.86 OK BF244 4 4.2 BAD